发明名称 Efficient input/output-aware multi-processor virtual machine scheduling
摘要 Computerized methods, computer systems, and computer-readable media for governing how virtual processors are scheduled to particular logical processors are provided. A scheduler is employed to balance a CPU-intensive workload imposed by virtual machines, each having a plurality of virtual processors supported by a root partition, across various logical processors that are running threads and input/output (I/O) operations in parallel. Upon measuring a frequency of the I/O operations performed by a logical processor that is mapped to the root partition, a hardware-interrupt rate is calculated as a function of the frequency. The hardware-interrupt rate is compared against a predetermined threshold rate to determine a level of an I/O-intensive workload being presently carried out by the logical processor. When the hardware-interrupt rate surpasses the predetermined threshold rate, the scheduler refrains from allocating time slices on the logical processor to the virtual machines.
申请公布号 US9081621(B2) 申请公布日期 2015.07.14
申请号 US200912626320 申请日期 2009.11.25
申请人 Microsoft Technology Licensing, LLC 发明人 Fahrig Thomas
分类号 G06F9/455;G06F9/50 主分类号 G06F9/455
代理机构 代理人 Webster Bryan;Drakos Kate;Minhas Micky
主权项 1. One or more computer storage memory hardware devices having computer-executable instructions embodied thereon that, when executed, perform a method for controlling an allocation rate of a logical processor to a root partition and to one or more virtual processors, wherein the logical processor is one of a plurality of logical processors that are partitioned on a physical machine to execute threads issued by the one or more virtual processors, the method comprising: monitoring over a window of time a pattern of input/output (I/O) operations performed by the root partition, wherein the logical processor is mapped to the root partition such that the root partition is exclusively scheduled on the logical processor; periodically updating a hardware interrupt rate stored in an interrupt table accessible by a scheduler during the window of time, wherein the hardware-interrupt rate is derived as a function of the pattern of I/O operations; and scheduling, by the scheduler, the one or more virtual processors to the plurality of logical processors, the scheduling comprising allocating the logical processor to execute threads, issued by the one or more virtual processors at a first rate and to execute the I/O operations, issued by the root partition, at a second rate, wherein the first rate is less than the second rate, inversely proportional to a hardware-interrupt rate stored in the interrupt table, greater than zero, and excluding the one or more virtual processors from being allocated to the logical processor at a rate greater than the first rate.
地址 Redmond WA US