发明名称 |
Adaptive startup control for boost converter |
摘要 |
This document discusses apparatus and methods for a boost converter start-up circuit. In an example, a start-up circuit can include a linear current generator configured to couple a supply terminal of the voltage converter to an output terminal of the voltage converter. The linear current generator can include a modified current mirror and a feedback circuit configured to provide a first representative of an output voltage of the output terminal to an input of each of a first and a second adjustable current source of the modified current mirror. |
申请公布号 |
US9081398(B2) |
申请公布日期 |
2015.07.14 |
申请号 |
US201313826818 |
申请日期 |
2013.03.14 |
申请人 |
Fairchild Semiconductor Corporation |
发明人 |
Kujala Juha-Matti;Oikarinen Juha Joonas |
分类号 |
H02M1/36;G05F1/10 |
主分类号 |
H02M1/36 |
代理机构 |
Schwegman Lundberg & Woessner, P.A. |
代理人 |
Schwegman Lundberg & Woessner, P.A. |
主权项 |
1. A start-up circuit for a voltage converter, the start-up circuit comprising:
a linear current generator configured to couple a supply terminal of the voltage converter to an output terminal of the voltage converter, the linear current generator comprising:
a modified current mirror, including:
a first adjustable current source; anda second adjustable current source; anda feedback circuit configured to provide a first representation of an output voltage of the output terminal to an input of each of the first and second adjustable current sources;wherein the modified current mirror includes:
a first sense transistor coupled to the supply terminal;a first mirror transistor having a gate coupled to a gate of the first sense transistor, the first mirror transistor coupled to the supply terminal and the output terminal;a second sense transistor coupled in series with the first mirror transistor and the second adjustable current source, and coupled to the output terminal; anda second mirror transistor having a gate coupled to a gate of the second sense transistor, the second mirror transistor coupled in series with the first sense transistor, wherein the gate of the first sense transistor is coupled to a drain of the second mirror transistor and the first adjustable current source. |
地址 |
San Jose CA US |