Method of fabricating a power semiconductor chip package

摘要

A device includes a vertical power semiconductor chip having an epitaxial layer and a bulk semiconductor layer. A first contact pad is arranged on a first main face of the power semiconductor chip and a second contact pad is arranged on a second main face of the power semiconductor chip opposite to the first main face. The device further comprises an electrically conducting carrier attached to the second contact pad.

主权项

1. A method of manufacturing a device, the method comprising:
forming a first contact pad on a first main face of a semiconductor chip, the semiconductor chip comprising an epitaxial layer and a bulk semiconductor layer; and mounting the semiconductor chip with the first contact pad via a connecting layer on an electrically conducting carrier, wherein a ratio of a thickness of the electrically conducting carrier and a sum of a thickness of the semiconductor chip, a thickness of the first contact pad and a thickness of the connecting layer is equal or greater than 3.