发明名称 |
Method of manufacturing a semiconductor device |
摘要 |
A method of manufacturing a semiconductor device having a twin well structure is provided. The method includes ion-implanting of a first conductivity type impurity in a first region and a second region of a semiconductor substrate, the first and second regions being located adjacent to each other; forming a first resist pattern to cover the first region of the semiconductor substrate and to expose the second region of the semiconductor substrate; ion-implanting of a second conductivity type impurity at a higher concentration compared to the first conductivity type impurity in the second region of the semiconductor substrate, with the first resist pattern being used as a mask; and thermal-diffusing the first conductivity type of impurity and the second conductivity type of impurity. |
申请公布号 |
US9082699(B2) |
申请公布日期 |
2015.07.14 |
申请号 |
US201313889507 |
申请日期 |
2013.05.08 |
申请人 |
Canon Kabushiki Kaisha |
发明人 |
Suzuki Nobuyuki;Migita Tomohiro;Suzuki Satoshi;Ohmura Masanobu;Nakahara Takatoshi;Sasaki Keiichi |
分类号 |
H01L21/266;H01L29/78;B41J2/00 |
主分类号 |
H01L21/266 |
代理机构 |
Fitzpatrick, Cella, Harper & Scinto |
代理人 |
Fitzpatrick, Cella, Harper & Scinto |
主权项 |
1. A method of manufacturing a semiconductor device having a twin well structure, comprising:
ion-implanting a first conductivity type impurity in a first region and a second region of a semiconductor substrate, the first and second regions being located adjacent to each other; forming a first mask pattern to cover the first region of the semiconductor substrate and to expose the second region of the semiconductor substrate; ion-implanting a second conductivity type impurity at a higher concentration compared to the first conductivity type impurity in the second region of the semiconductor substrate, using the first mask pattern as a mask; thermal-diffusing the first conductivity type of impurity and the second conductivity type of impurity; and forming an ink supply port passing through the second region of the semiconductor substrate. |
地址 |
Tokyo JP |