| 主权项 |
1. A method comprising:
determining, by a processor of a microprocessor system, that an instruction for execution on the processor indicates a persistent write to memory, wherein the microprocessor system comprises a cache, a memory controller, a bus coupling the processor to the memory controller, and the memory, wherein the memory is coupled with the memory controller; in response to said determining that the instruction for execution on the processor indicates the persistent write to memory, initiating tracking of a completion state of the instruction; writing, by the processor, data associated with the instruction to a cache entry of the cache, wherein the cache entry is indicated by a parameter of the instruction; indicating to the memory controller, by the processor via the bus, that the instruction indicates the persistent write to memory; receiving, by the processor, from the memory controller via the bus, a notification that the data associated with the instruction has been written to the memory, wherein the data associated with the instruction is written to the memory by the memory controller; and in response to receiving the notification that the data associated with the instruction has been written to the memory, indicating that the persistent write to memory has completed. |
