发明名称 |
Pass gate and semiconductor storage device having the same |
摘要 |
According to an embodiment, a semiconductor storage device includes an SRAM cell. The SRAM cell includes first and second transfer gates each comprising a pass gate. The pass gate includes first and second tunnel transistors. The first tunnel transistor includes a first conductivity type first diffusion region as a source or drain region, a second conductivity type second diffusion region as a drain or source region, and a gate electrode supplied with a control voltage. The second tunnel transistor includes a first conductivity type first diffusion region as a source or drain region, a second conductivity type second diffusion region as a drain or source region electrically connected to the second diffusion region of the first tunnel transistor, and a gate electrode electrically connected to the gate electrode of the first tunnel transistor. |
申请公布号 |
US9082640(B2) |
申请公布日期 |
2015.07.14 |
申请号 |
US201313779358 |
申请日期 |
2013.02.27 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Nakatsuka Keisuke;Kawanaka Shigeru |
分类号 |
H01L27/088;H01L27/11;H01L27/02;G11C11/412;H01L29/739 |
主分类号 |
H01L27/088 |
代理机构 |
Knobbe, Martens, Olson & Bear, LLP |
代理人 |
Knobbe, Martens, Olson & Bear, LLP |
主权项 |
1. A semiconductor storage device, comprising:
an SRAM cell formed to a semiconductor layer, the SRAM cell comprising: first and second load transistors each comprising an N-type source region and a P-type drain region; first and second driver transistors each comprising a P-type source region and an N-type drain region; and first and second transfer gates each comprising a pass gate, and each of the pass gate of the first transfer gate and the pass gate of the second transfer gate comprising: a first tunnel transistor comprising a first conductivity type first diffusion region as a source or drain region, a second conductivity type second diffusion region as a drain or source region, and a gate electrode supplied with a control voltage; and a second tunnel transistor connected to the first tunnel transistor in series, the second tunnel transistor comprising a first conductivity type first diffusion region as a source or drain region, a second conductivity type second diffusion region as a drain or source region electrically connected to the second diffusion region of the first tunnel transistor, and a gate electrode electrically connected to the gate electrode of the first tunnel transistor, wherein the first and second load transistors, and the first and second driver transistors are tunnel transistors. |
地址 |
Tokyo JP |