Dynamic read scheme for high reliability high performance flash memory

摘要

In accordance with at least one embodiment, a method and apparatus for improving the ability to correct errors in memory devices is described. At least one embodiment provides a way to salvage the part even it has double-bit or multi-bit error from the same ECC section, thus improving product reliability and extending the product lifetime. During a normal read, if a double-bit or multiple-bit error happens, which ECC can detect but cannot fix, the error is corrected by adjusting the read voltage level and reading again to determine the proper read level (and, therefore, the correct value being read). This dynamic read scheme can apply to extrinsic bits from either erase state or program state. It can be also used in a single bit scenario to minimize ECC occurrence and save ECC capacity.

主权项

1. A method comprising:
performing a memory read operation using a first read voltage level; detecting that the memory read operation has resulted in a memory read error; and in response to detecting the memory read error includes more than one incorrect bit:
performing a higher read voltage memory read operation using a higher read voltage level higher than the first read voltage level;performing a lower read voltage memory read operation using a lower read voltage level lower than the first read voltage level; andselecting a revised read voltage level for subsequent memory read operations based on the performing the higher read voltage memory read operation and the performing the lower read voltage memory read operation,
wherein the selecting the revised read voltage level for the subsequent memory read operations further comprises:in response to the memory read error occurring in response to using the higher read voltage level and occurring in response to using the lower read voltage level, increasing the higher read voltage level, decreasing the lower read voltage level, and reiterating the performing the higher read voltage memory read operation, the performing the lower read voltage memory read operation, and the selecting the revised read voltage level; andin response to the memory read error not occurring in response to using the higher read voltage level and not occurring in response to using the lower read voltage level, providing an indicator that a memory device has failed.