Clock generation circuit and clock generation system using the same

摘要

A clock generation circuit includes a counting code generation unit configured to generate counting codes corresponding to a frequency of an input clock when an enable signal is enabled; a control code generation unit configured to decode the counting codes and generate control codes; and a cycle changeable oscillation unit configured to determine a frequency of an output clock in response to the control codes.

主权项

1. A clock generation circuit comprising:
a counting code generation unit configured to receive an input clock from an outside, to generate an oscillator signal during a period corresponding to the frequency of the input clock and to count the oscillator signal thereby generating counting codes when an enable signal is enabled; a control code generation unit configured to decode the counting codes and generate control codes; and a cycle changeable oscillation unit configured to generate an output clock, wherein a frequency of the output clock is determined in response to the control codes, wherein the oscillator signal is generated in an oscillator included in the counting code generation unit.