发明名称 |
SYSTEM AND METHOD FOR USING CLOCK CHAIN SIGNALS OF AN ON-CHIP CLOCK CONTROLLER TO CONTROL CROSS-DOMAIN PATHS |
摘要 |
An on-chip clock controller configured to control cross-domain paths using clock chain signals is disclosed. The on-chip clock controller includes a clock bits module configured to receive a clock chain signal and to output an enable signal based upon the clock chain signal. The on-chip clock controller also includes a clock gating module that is communicatively coupled to the clock bits module. The clock gating module is configured to receive a clock signal and to selectively output either a signal corresponding to the clock signal or a non-transitioning signal based upon the enable signal for operating a state storage module. |
申请公布号 |
US2015193564(A1) |
申请公布日期 |
2015.07.09 |
申请号 |
US201414149059 |
申请日期 |
2014.01.07 |
申请人 |
LSI Corporation |
发明人 |
Pereira Daryl;Agrawal Deepak;Shinde Sanjay T.;Manickam Sekar;Venkatachalam Aanand |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
1. An on-chip clock controller comprising:
a clock bits module configured to receive a clock chain signal and to output an enable signal based upon the clock chain signal; and a clock gating module communicatively coupled to the clock bits module, the clock gating module configured to receive a clock signal and to selectively output at least one of a signal corresponding to the clock signal or a substantially non-transitioning signal based upon the enable signal for operating a state storage module configured to store state information. |
地址 |
San Jose CA US |