METHOD AND APPARATUS FOR SWITCHING POWER IN A DUAL RAIL MEMORY

摘要

A memory apparatus includes an array of bit cells arranged in rows and columns, multiple pairs of complementary bit lines, multiple power lines, and multiple voltage control circuits. Each column of the array is selectable by a corresponding pair of complementary bit lines. Each power line is coupled to the bit cells in a corresponding column. The voltage control circuits are coupled to respective columns of the array. Each voltage control circuit is configured to set a voltage level of a respective one of the power lines responsive to logic levels of the pair of complementary bit lines corresponding to the respective column.

主权项

1. A memory apparatus comprising:
a first array of bit cells arranged in rows and columns; a second array of bit cells arranged in rows and columns, wherein the second array is distinct from the first array, and the first and second rays have a common number of columns; a plurality of pairs of complementary bit lines, each column of the first and second arrays being selectable by a corresponding pair of complementary bit lines; a plurality of power lines, each power line coupled to the bit cells of the first and second arrays in a corresponding column; and a plurality of voltage control circuits coupled to respective columns of the first and second arrays, each voltage control circuit configured to set a voltage level of a respective one of the power lines responsive to logic levels of the pair of complementary bit lines corresponding to the respective column, wherein each voltage control circuit is located adjacent to a bit cell of the first array at an end of the respective column and is located adjacent to a bit cell of the second array at an end of the respective column.