发明名称 METHOD AND SYNCHRONIZING CLOCK PROVING SYSTEM FOR SETTING MASTER CLOCK SOURCE FOR N+1 REDUNDANT SWITCH FABRICS CARD
摘要 Provided are a method for setting a master clock source in a switch fabric card having a N+1 multiplexing structure and a system for providing a synchronous clock. The method for setting a master clock source may transition a state of a clock source to any among a master, a pre-master and a slave according to a state of the clock source, and the clock source switching mode, depending on whether the clock source is valid or not, and according to a priority of the clock source.
申请公布号 KR20150078985(A) 申请公布日期 2015.07.08
申请号 KR20130168903 申请日期 2013.12.31
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 CHOI, CHANG HO;CHEUNG, TAE SIK
分类号 G06F13/00;G06F1/04 主分类号 G06F13/00
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