| 摘要 |
A command processing circuit includes a clock distributing unit, a clock control unit, and a command decoding unit. The clock distributing unit generates a plurality of distributed clock signals with phases which are different from the phase of a second frequency which is smaller than a first frequency based on an external clock signal with the first frequency. The clock control unit provides one operation clock signal with a phase corresponding to the reception timing of a command signal and the second frequency based on the distributed clock signals and the command signal transmitted by synchronizing with the external clock signal. The command decoding unit decodes the command signal by synchronizing with the operation clock signal. |
