METAL LINE CONNECTION FOR IMPROVED RRAM RELIABILITY, SEMICONDUCTOR ARRANGEMENT COMPRISING THE SAME, AND MANUFACTURE THEREOF

摘要

An integrated circuit device comprises an array of RRAM cells, an array of bit lines for array of RRAM cells, and an array of source lines of an array of RRAM cells. The source lines and bit lines are placed on metal mutual connection layers on RRAM cells. Accordingly, source lines larger than an existing wire are provided, so that reset rate is increased 10 times faster. The life of RRAM transistors and durability of an RRAM device is improved in similar level.