发明名称 Solid state image pickup device having a capacitor structure made up of a plurality of capacitors
摘要 A solid state image pickup device is provided that includes a pixel array unit having a plurality of pixels and a signal processing circuit that has a capacitor operatively configured to process a respective signal output from each of the plurality of pixels. The capacitor is operatively configured as a stacked capacitor or a trench capacitor.
申请公布号 US9077922(B2) 申请公布日期 2015.07.07
申请号 US200511176476 申请日期 2005.07.07
申请人 SONY CORPORATION 发明人 Wakano Toshifumi;Mabuchi Keiji
分类号 H04N5/378;H04N5/357 主分类号 H04N5/378
代理机构 Sheridan Ross P.C. 代理人 Sheridan Ross P.C.
主权项 1. A solid state image pickup device, comprising: a pixel array unit having a plurality of pixels in a two-dimensional matrix that includes a plurality of pixel columns, wherein each pixel includes a photoelectric converting element, and wherein each pixel is included in one of the pixel columns; a plurality of signal processing circuits each operable to process a respective signal output from each of the plurality of pixels, wherein at least one signal processing circuit is provided for each of the pixel columns, wherein each signal processing circuit includes at least one of a correlated double sampling circuit and an analog/digital converter circuit, the at least one of the correlated double sampling circuit and the analog/digital converter circuit each including at least a first and a second capacitor structure, each of the first and the second capacitor structures being one of a trench and a stacked structure, the stacked structure including: (i) a T-shaped wiring comprised of (a) a first longitudinally and relatively horizontally extending and rectangularly-shaped in cross section top portion having two sides on opposite ends of the top portion, a top surface between the two sides and respective relatively vertically extending planar side surfaces at the sides and (b) a second relatively vertically extending leg portion which extends from the longitudinally extending top portion, the top surface and the side surfaces of the first longitudinally extending top portion being a portion of a three dimensional capacitor,(ii) a storage electrode over only the longitudinally extending top portion and so as to overlie the top surface and the side surfaces of the first longitudinally extending top portion, and(iii) an insulating film between the storage electrode and the first longitudinally extending top portion,wherein,the insulating film has a first side that is in contact with only the top surface and the side surfaces of the first longitudinally extending top portion,the insulating film does not contact the second relatively vertically extending leg portion,the first longitudinally extending top portion, the storage electrode and the insulating film between them form a three-dimensional stacked capacitor; anda transistor circuit under the T-shaped wiring, wherein the transistor circuit is within the solid state image pickup device; and the trench structure including: (i) a substrate with a trench therein;(ii) a low resistance layer on all interior surfaces of the trench and extending over a surface of the substrate adjacent the trench, wherein the low resistance layer is an n-layer;(iii) a storage electrode embedded in the trench, the storage electrode having a first relatively horizontally extending member over the surface of the substrate adjacent the trench and a second relatively vertically extending member extending into the trench; and(iv) an insulating film between the storage electrode and the low resistance layer, wherein only the low resistance layer, the storage electrode, and the insulating film completely fill the trench, and the storage electrode, the low resistance layer and the insulating film between them form a three-dimensional trench capacitor; wherein the first capacitor structure is electrically connected to the second capacitor structure; and wherein each of the capacitor structures includes a plurality of small capacitor structures that are arranged in a capacitor column, each of the plurality of small capacitor structures having the same capacitance.
地址 JP