Methods and structures for compensating and tracking process, voltage and temperature variations

摘要

An integrated circuit having a clock synchronizing circuit is described. The clock synchronizing circuit includes an input-output buffer and a plurality of sampling buffer circuits. The input-output buffer receives an input signal and generating an output signal. Each sampling buffer circuit receives the output signal and a sampling clock signal. Each sampling buffer circuit generates a first sampled output by sampling the output signal at the rising edge of the corresponding sampling clock signal and a second sampled output by sampling the output signal on the falling edge of the corresponding sampling clock signal. The sampling clock signal has a predetermined phase difference at each of the plurality of sampling buffer circuits.

主权项

1. A clock synchronizing circuit on an integrated circuit, wherein the integrated circuit receives a data signal and an associated data strobe signal for validating the data signal, comprising:
an input-output buffer that receives the associated data strobe signal and that generates a corresponding output data strobe signal; and a plurality of sampling buffer circuits, each of which receives the output data strobe signal and a respective sampling clock signal, outputs a first sampled output by sampling the output data strobe signal at rising edges of the sampling clock signal, and outputs a second sampled output by sampling the output data strobe signal on falling edges of the sampling clock signal, wherein there is a predetermined phase difference between the sampling clock signals received at each of the plurality of sampling buffer circuits.