| 发明名称 | MOS transistor operated as OTP cell with gate dielectric operating as an e-fuse element | ||
| 摘要 | A process and device are provided for a high-k gate-dielectric operating as a built-in e-fuse. Embodiments include: providing first and second active regions of a transistor, separated by a gate region of the transistor, on a substrate; forming an interfacial layer on the gate region; minimizing the interfacial layer; forming a high-k gate dielectric layer on the interfacial layer to operate as an e-fuse element, the high-k gate dielectric layer and interfacial layer having a combined breakdown voltage less than three times a circuit operating voltage associated with the transistor; and forming a metal gate on the high-k gate dielectric layer. | ||
| 申请公布号 | US9076791(B1) | 申请公布日期 | 2015.07.07 |
| 申请号 | US201414156018 | 申请日期 | 2014.01.15 |
| 申请人 | GLOBALFOUNDRIES Inc. | 发明人 | Chi Min-hwa;Liu Yanxiang |
| 分类号 | H01L23/525 | 主分类号 | H01L23/525 |
| 代理机构 | Ditthavong & Steiner, P.C. | 代理人 | Ditthavong & Steiner, P.C. |
| 主权项 | 1. A method comprising: providing first and second active regions of a transistor, separated by a gate region of the transistor, on a substrate; forming an interfacial layer on the gate region; minimizing the interfacial layer; forming a high-k gate dielectric layer on the interfacial layer to operate as an e-fuse element, the high-k gate dielectric layer and interfacial layer having a combined breakdown voltage less than three times a circuit operating voltage associated with the transistor; and forming a metal gate on the high-k gate dielectric layer. | ||
| 地址 | Grand Cayman KY | ||