Lateral insulated gate bipolar transistor structure with low parasitic BJT gain and stable threshold voltage

摘要

A metal-oxide-semiconductor laterally diffused device (HV LDMOS), particularly a lateral insulated gate bipolar junction transistor (LIGBT), and a method of making it are provided in this disclosure. The device includes a silicon-on-insulator (SOI) substrate having a drift region, two oppositely doped well regions in the drift region, two insulating structures over and embedded in the drift region and second well region, a gate structure, and a source region in the second well region over a third well region embedded in the second well region. The third well region is disposed between the gate structure and the second insulating structure.

主权项

1. A semiconductor device comprising:
a semiconductor substrate having an insulator layer and a silicon layer over the insulator layer; and a transistor region over the semiconductor substrate, the transistor region comprising:
a drift region having a first type of conductivity over the insulator layer;a first well in the drift region and having the first type of conductivity;a second well in the drift region and having a second type of conductivity, the second type of conductivity being opposite the first type of conductivity;a first insulating structure over and partially embedded in the drift region between the first well and the second well;a second insulating structure over and partially embedded in the second well;a gate structure over the first insulating structure and partially over the second well;a drain region in the first well;a source region in the second well between the second insulating structure and the gate structure, the source region including a first source region having the second type of conductivity and a second source region having the first type of conductivity, wherein the second source region comprises a first portion directly under the gate structure and having a first dopant concentration, and a second portion not directly under the gate structure and having a second dopant concentration, the first dopant concentration being lower than the second dopant concentration; anda third well within the second well and disposed under the source region and aligned with the second portion of the second source region, the third well having the second type of conductivity at a dopant concentration higher than a dopant concentration of the second well.