| 发明名称 | Systems and methods to enhance passivation integrity | ||
| 摘要 | A semiconductor device having enhanced passivation integrity is disclosed. The device includes a substrate, a first layer, and a metal layer. The first layer is formed over the substrate. The first layer includes a via opening and a tapered portion proximate to the via opening. The metal layer is formed over the via opening and the tapered portion of the first layer. The metal layer is substantially free from gaps and voids. | ||
| 申请公布号 | US9076804(B2) | 申请公布日期 | 2015.07.07 |
| 申请号 | US201313974400 | 申请日期 | 2013.08.23 |
| 申请人 | Taiwan Semiconductor Manufacturing Co., Ltd. | 发明人 | Liao Ying-Chieh;Yang Han-Wei;Lai Chen-Chung;Kuo Kang-Min;Tien Bor-Zen |
| 分类号 | H01L23/485;H01L21/4763;H01L23/00;H01L23/48;H01L21/768;H01L23/482;H01L23/522;H01L23/528;H01L29/40 | 主分类号 | H01L23/485 |
| 代理机构 | Eschweiler & Associates, LLC | 代理人 | Eschweiler & Associates, LLC |
| 主权项 | 1. A semiconductor device having enhanced passivation integrity, the device comprising: a substrate; a first layer formed over the substrate, wherein the first layer includes a via opening and a tapered portion proximate to the via opening, the tapered portion includes one or more modulation bar openings; and a metal layer formed over the via opening and the tapered portion of the first layer, wherein the metal layer is substantially free from gaps and voids. | ||
| 地址 | Hsin-Chu TW | ||