发明名称 |
Semiconductor device and method of manufacturing the same |
摘要 |
According to one embodiment, there is provided a semiconductor device using graphene, includes a catalyst layer formed on or in a substrate along with an interconnect pattern and a graphene layer formed on the catalyst layer. The graphene layer is arranged parallel to a narrower linewidth than the width of the interconnect pattern. |
申请公布号 |
US9076795(B1) |
申请公布日期 |
2015.07.07 |
申请号 |
US201414478996 |
申请日期 |
2014.09.05 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
Saito Tatsuro;Wada Makoto;Isobayashi Atsunobu;Kajita Akihiro;Sakai Tadashi |
分类号 |
H01L23/52;H01L23/532;H01L21/768;H01L23/528;H01L23/522 |
主分类号 |
H01L23/52 |
代理机构 |
Holtz, Holtz, Goodman & Chick PC |
代理人 |
Holtz, Holtz, Goodman & Chick PC |
主权项 |
1. A semiconductor device, comprising:
a catalyst layer formed on or in a substrate along with an interconnect pattern; and a plurality of graphene layers formed on the catalyst layer, the plurality of graphene layers arranged in parallel in a narrower linewidth than a width of the interconnect pattern. |
地址 |
Tokyo JP |