发明名称 Interlocking light sheet tiles
摘要 A system of interlocking LED panel tiles includes a first tile having at least one layer of light emitting diodes (LEDs) provided on a substrate, where the substrate is mounted on a substantially rectangular supporting plate having interlocking features. The substrate overlaps the interlocking features. The first tile has a set of positive and negative voltage conductors running between the two sets of opposite edges of the tile as busses. Multiple identical tiles are provided. Each tile has the interlocking features along their edges that firmly physically connect to abutting tiles to create a lamp having any pattern of tiles selected by the user. By interlocking the tiles, the positive and negative conductors are automatically connected to electrically connect the LEDs in the tiles in parallel, and the interlocking features are hidden by the overlying substrate. Additional conductors may be used to provide greater interconnection flexibility.
申请公布号 US9074758(B2) 申请公布日期 2015.07.07
申请号 US201414162257 申请日期 2014.01.23
申请人 Nthdegree Technologies Worldwide Inc. 发明人 Oraw Bradley Steven;Meier Marc Oliver
分类号 H01R33/00;F21V23/06;F21K99/00;H01L25/075;F21V21/005;F21Y101/02 主分类号 H01R33/00
代理机构 Patent Law Group LLP 代理人 Patent Law Group LLP ;Ogonowsky Brian D.
主权项 1. An illumination structure comprising: a first tile comprising: at least one layer of light emitting diodes (LEDs) provided on a top surface of a first substrate;a substantially rectangular supporting plate, the supporting plate having a first edge, a second edge opposite the first edge, a third edge, and a fourth edge opposite the third edge, wherein a bottom surface of the first substrate is affixed to a top surface of the supporting plate;a positive voltage conductor running between the first edge and the second edge and between the third edge and the fourth edge;a negative voltage conductor running between the first edge and the second edge and between the third edge and the fourth edge;first edge features along the first edge and the third edge, the first edge features having a protruding neck portion and an expanded portion connected to the first tile by the neck portion, the first edge features including at least a first electrical contact electrically coupled to at least one of the positive voltage conductor and the negative voltage conductor;second edge features along the second edge and the fourth edge, the second edge features having an indented neck portion and an expanded indented portion, the second edge features including at least a second electrical contact electrically coupled to at least one of the positive voltage conductor and the negative voltage conductor,wherein edges of the first substrate overlie the second edge features along the second edge and the fourth edge; a second tile identical to the first tile, wherein the first edge features of the first tile interlock with the second edge features of the second tile to secure the first tile to the second tile when the first tile and the second tile are abutting, wherein the edges of the first substrate cover the interlocked first edge features and the second edges features after the first tile is interlocked with the second tile, wherein interlocking the first tile to the second tile causes the positive voltage conductor of the first tile to contact the positive voltage conductor of the second tile, and causes the negative voltage conductor of the first tile to contact the negative voltage conductor of the second tile such that at least some of the LEDs in the first tile are electrically connected to at least some of the LEDs in the second tile upon the first tile being interlocked to the second tile.
地址 Tempe AZ US