发明名称 Program status word dependency handling in an out of order microprocessor design
摘要 A computer implemented method of processing instructions of a computer program. The method comprises providing at least two copies of program status data; identifying a first update instruction of the instructions that writes to at least one field of the program status data; and associating the first update instruction with a first copy of the at least two copies of program status data.
申请公布号 US9075600(B2) 申请公布日期 2015.07.07
申请号 US201012822974 申请日期 2010.06.24
申请人 International Business Machines Corporation 发明人 Alexander Gregory W.;Barrick Brian D.;Billeci Michael;Busaba Fadi Y.;Giamei Bruce C.;Schroter David A.
分类号 G06F9/30;G06F9/38 主分类号 G06F9/30
代理机构 Cantor Colburn LLP 代理人 Cantor Colburn LLP ;McNamara Margaret
主权项 1. An apparatus for processing instructions of a computer program, the apparatus comprising: a processor configured to perform a method comprising: providing at least two copies of program status data;identifying a first update instruction of the instructions that writes to at least one field of the program status data;associating the first update instruction with a first copy of the at least two copies of program status data using a pointer that points to a first copy of the at least two copies of program status data by toggling the pointer to point to a second copy of the at least two copies of the program status data;identifying a second update instruction of the instructions that writes to at least one field of the program status data, the second update instruction being in an issue queue associated with a pipeline at the same time as the first update instruction, and the second update instruction being younger than the first update instruction; andassociating the second update instruction with a second copy of the at least two copies of program status data using the pointer by toggling the pointer to point to the first copy of the at least two copies of the program status data.
地址 Armonk NY US