发明名称 Fuse information storage circuit of semiconductor apparatus
摘要 A test mode decoder configured to decode a test mode signal inputted a plurality of times and to generate preliminary fuse information, a count latch configured to count the preliminary fuse information in response to a count clock signal and to generate fuse information, and a fuse array block configured to store the fuse information can be included.
申请公布号 US9076538(B2) 申请公布日期 2015.07.07
申请号 US201314100168 申请日期 2013.12.09
申请人 SK Hynix Inc. 发明人 Baek Chang Ki
分类号 G11C17/00;G11C17/16;G11C29/44 主分类号 G11C17/00
代理机构 William Park & Associates Ltd. 代理人 William Park & Associates Ltd.
主权项 1. A fuse information storage circuit of a semiconductor apparatus, comprising: a test mode decoder configured to decode a test mode signal inputted a plurality of times, and to generate preliminary fuse information; a count latch configured to count the preliminary fuse information in response to a count clock signal, and to generate fuse information; and a fuse array block configured to store the fuse information.
地址 Gyeonggi-do KR