发明名称 Utility and lifetime based cache replacement policy
摘要 Embodiments of the invention describe an apparatus, system and method for utilizing a utility and lifetime based cached replacement policy as described herein. For processors having one or more processor cores and a cache memory accessible via the processor core(s), embodiments of the invention describe a cache controller to determine, for a plurality of cache blocks in the cache memory, an estimated utility and lifetime of the contents of each cache block, the utility of a cache block to indicate a likelihood of use its contents, the lifetime of a cache block to indicate a duration of use of its contents. Upon receiving a cache access request resulting in a cache miss, said cache controller may select one of the cache blocks to be replaced based, at least in part, on one of the estimated utility or estimated lifetime of the cache block.
申请公布号 US9075746(B2) 申请公布日期 2015.07.07
申请号 US201113992240 申请日期 2011.12.23
申请人 Intel Corporation 发明人 Hyuseinova Nevin;Cai Qiong;Ozdemir Serkan;Falcon Ayose J.
分类号 G06F12/12;G06F12/08;G06F13/16 主分类号 G06F12/12
代理机构 Nicholson De Vos Webster & Elliott LLP 代理人 Nicholson De Vos Webster & Elliott LLP
主权项 1. A method comprising: determining, for a plurality of cache blocks in a cache memory, an estimated utility and lifetime of the contents of each cache block, the utility of a cache block to indicate a likelihood of use its contents, the lifetime of a cache block to indicate a duration of use of its contents; receiving a cache access request resulting in a cache miss; and selecting one of the cache blocks to be replaced based, at least in part, on one of the estimated utility or estimated lifetime of the cache block.
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