发明名称 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
摘要 Methods for fabricating semiconductor devices are provided. Gate structures are formed on a top surface of a substrate to form semiconductor devices. Trenches are formed in the substrate on both sides of each gate structure of each semiconductor device. The trenches on the both sides of each gate structure are filled with stress layers, the stress layers in the substrate protruding over the top surface of the substrate The stress layers are ion-doped and annealed on the both sides of each gate structure, and are pulse-etched to form a source region and a drain region of each gate structure. The pulse-etching is controlled such that the source regions and the drain regions of the plurality of semiconductor devices have a top surface coplanar with the top surface of the substrate.
申请公布号 US2015187908(A1) 申请公布日期 2015.07.02
申请号 US201414520299 申请日期 2014.10.21
申请人 Semiconductor Manufacturing International (Shanghai) Corporation 发明人 ZHANG HAIYANG;REN JIA
分类号 H01L29/66;H01L21/02;H01L29/78;H01L21/3065 主分类号 H01L29/66
代理机构 代理人
主权项 1. A method of forming a semiconductor device, comprising: providing a substrate; forming a plurality of gate structures on a top surface of the substrate to form a plurality of semiconductor devices; forming trenches in the substrate on both sides of each gate structure of each semiconductor device; filling the trenches on the both sides of each gate structure with stress layers, the stress layers in the substrate protruding over the top surface of the substrate; ion-implanting the stress layers on the both sides of each gate structure; annealing the stress layers after ion-implantation; and pulse-etching the stress layers to form a source region and a drain region on the both sides of each gate structure, wherein the pulse-etching is controlled such that the source regions and the drain regions of the plurality of semiconductor devices have a top surface coplanar with the top surface of the substrate.
地址 Shanghai CN