DEADLOCK PREVENTION IN A PROCESSOR

摘要

Disclosed herein is a caching agent for preventing deadlock in a processor. The caching agent includes a receiver configured to receive a request from a core of the processor. The caching agent includes ingress logic coupled to the receiver to determine that the request is potentially a cacheable request. The ingress logic is to determine that the request does not deplete an available coherence resource. The ingress logic is to allow the request to be processed in response to the determination that the request does not deplete the available coherence resource.

主权项

1. A caching agent for reducing deadlock in a processor, comprising:
a receiver to receive a request from a core of the processor to an input/output (I/O) device that will generate an I/O cache request; ingress logic coupled to the receiver to:
determine that the request is potentially a cacheable request based on a detected state of the core indicated by the request;determine that the request does not deplete an available coherence resource; andallow the request to be processed in response to the determination that the request does not deplete the available coherence resource.