HYBRID HIGH-K FIRST AND HIGH-K LAST REPLACEMENT GATE PROCESS

摘要

An integrated circuit is provided with a metal gate NMOS transistor (130) with a high-k first gate dielectric (108) on a high quality thermally grown interface dielectric (106) and with a metal gate PMOS transistor (132) with a high-k last gate dielectric (136) on a chemically grown interface dielectric (134). Process flows are provided for forming an integrated circuit with a metal gate NMOS transistor (130) with a high-k first gate dielectric (108) on a high quality thermally grown interface dielectric (106) and with a metal gate PMOS transistor (132) with a high-k last gate dielectric (136) on a chemically grown interface dielectric (134).