INTEGRATED CIRCUIT LAYOUTS AND METHODS TO REDUCE LEAKAGE

摘要

An embodiment includes a method, comprising: receiving a layout of an integrated circuit having a plurality of regions; determining a utilization for each of the regions; for each region, selecting from among a plurality of switch cell organizations for the region in response to the corresponding utilization; and for each region, modifying the layout to include switch cells for the region according to the selected switch cell organization.

主权项

1. A method, comprising:
receiving, by a computer, a layout of an integrated circuit having a plurality of regions; determining, by a computer, a utilization for each of the regions, including, for each region, determining the utilization for the region in response to scaling at least one of a cell density and a clock speed of the region; for each region, selecting, by a computer, from among a plurality of switch cell organizations for the region in response to the corresponding utilization; and for each region, modifying, by a computer, the layout to include switch cells for the region according to the selected switch cell organization.