发明名称 Trace Design for Bump-on-Trace (BOT) Assembly
摘要 A bump-on-trace (BOT) interconnection in a package and methods of making the BOT interconnection are provided. An embodiment BOT interconnection comprises a landing trace including a distal end, a conductive pillar extending at least to the distal end of the landing trace; and a solder feature electrically coupling the landing trace and the conductive pillar. In an embodiment, the conductive pillar overhangs the end surface of the landing trace. In another embodiment, the landing trace includes one or more recesses for trapping the solder feature after reflow. Therefore, a wetting area available to the solder feature is increased while permitting the bump pitch of the package to remain small.
申请公布号 US2015187719(A1) 申请公布日期 2015.07.02
申请号 US201314143648 申请日期 2013.12.30
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Lin Yen-Liang;Chen Chen-Shien;Kuo Tin-Hao
分类号 H01L23/00 主分类号 H01L23/00
代理机构 代理人
主权项 1. A method of forming a bump-on-trace (BOT) assembly, comprising: forming a landing trace on a substrate; positioning a conductive pillar over the landing trace such that the conductive pillar extends at least to an end of the landing trace; and reflowing a solder feature between the landing trace and the conductive pillar to electrically couple the landing trace to the conductive pillar.
地址 Hsin-Chu TW