发明名称 半導体記憶装置及び半導体記憶装置におけるメモリアクセス方法
摘要 <p>A semiconductor memory device includes: first and second memory mats; first and second local input output lines coupled to the first memory mat via a first amplifier circuit; third and fourth local input output lines different from the first and second local input output lines, third and fourth local input output lines coupled to the second memory mat via a second amplifier circuit; a third amplifier circuit coupled between the first local input output line and a first main input output line; a fourth amplifier circuit coupled between the third local input output line and a second main input output line different from the first main input output line; and a first switch coupled between the second and third local input output lines and connecting the second local input output line to the fourth amplifier circuit when the first memory mat is activated and the second memory mat is not activated.</p>
申请公布号 JP5743045(B2) 申请公布日期 2015.07.01
申请号 JP20080184974 申请日期 2008.07.16
申请人 发明人
分类号 G11C11/401;G11C11/4096 主分类号 G11C11/401
代理机构 代理人
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