发明名称 半導体装置および半導体装置の製造方法
摘要 Some embodiments of the present invention relate to a semiconductor device and a method of manufacturing a semiconductor device capable of preventing the deterioration of electrical characteristics. A p-type collector region is provided on a surface layer of a backside surface of an n-type drift region. A p+-type isolation layer for obtaining reverse blocking capability is provided at the end of an element. In addition, a concave portion is provided so as to extend from the backside surface of the n-type drift region to the p+-type isolation layer. A p-type region is provided and is electrically connected to the p+-type isolation layer. The p+-type isolation layer is provided so as to include a cleavage plane having the boundary between the bottom and the side wall of the concave portion as one side.
申请公布号 JP5740820(B2) 申请公布日期 2015.07.01
申请号 JP20100045740 申请日期 2010.03.02
申请人 富士電機株式会社 发明人 脇本 博樹;井口 研一;吉川 功;中嶋 経宏;田中 俊介;荻野 正明
分类号 H01L29/739;H01L29/06;H01L29/78 主分类号 H01L29/739
代理机构 代理人
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