发明名称 |
CALIBRATING TIMING, GAIN AND BANDWIDTH MISMATCH IN INTERLEAVED ADCS |
摘要 |
<p>A method and a corresponding device for calibrating an interleaved analog-to-digital converter (ADC) involve injecting a randomly determined amount of dither into at least one of a flash component and a multiplying digital-to-analog converter (MDAC) in a selected channel in the ADC. A correlation procedure is performed to estimate, based on an overall ADC output, a gain experienced by the injected dither after propagating through the channel. The injection and the correlation procedure are repeated on at least one additional channel to estimate a gain for each at least one additional channel. The estimated gains of the selected channel and the at least one additional channel are then compared to determine a degree of mismatch between the selected channel and each at least one additional channel. At least one channel is calibrated as a function of the determined degree of mismatch.</p> |
申请公布号 |
EP2781026(A4) |
申请公布日期 |
2015.07.01 |
申请号 |
EP20120849693 |
申请日期 |
2012.09.10 |
申请人 |
ANALOG DEVICES, INC. |
发明人 |
ALI, AHMED, MOHAMMED ABDELATTY |
分类号 |
H03M1/10;H03M1/12 |
主分类号 |
H03M1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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