发明名称 Semiconductor devices having through-vias and methods for fabricating the same
摘要 A conductive via of a semiconductor device is provided extending in a vertical direction through a substrate, a first end of the conductive via extending through a first surface of the substrate, so that the first end protrudes in the vertical direction relative to the first surface of the substrate. An insulating layer is provided on the first end of the conductive via and on the first surface of the substrate. An upper portion of a mask layer pattern is removed so that a capping portion of the insulating layer that is on the first end of the conductive via is exposed. A portion of the insulating layer at a side of, and spaced apart from, the conductive via, is removed, to form a recess in the insulating layer. The capping portion of the insulating layer on the first end of the conductive via is simultaneously removed.
申请公布号 US9070748(B2) 申请公布日期 2015.06.30
申请号 US201314108771 申请日期 2013.12.17
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 Kang Pil-Kyu;Kim Taeyeong;Park Byung Lyul;Park Jumyong;Park Jinho;Lee Kyu-Ha;Jung Deok-Young;Choi Gilheyun
分类号 H01L21/768 主分类号 H01L21/768
代理机构 Onello & Mello, LLP 代理人 Onello & Mello, LLP
主权项 1. A method of forming a semiconductor device, comprising: providing a conductive via extending in a vertical direction through a substrate, a first end of the conductive via extending through a first surface of the substrate, so that the first end protrudes in the vertical direction relative to the first surface of the substrate; providing an insulating layer on the first end of the conductive via and on the first surface of the substrate; providing a mask layer on the insulating layer, and patterning the mask layer to form a mask layer pattern, the mask layer pattern having an opening at a side of the conductive via; removing an upper portion of the mask layer pattern so that a capping portion of the insulating layer that is on the first end of the conductive via is exposed; and removing a portion of the insulating layer at a side of, and spaced apart from, the conductive via, using the mask layer pattern as an etch mask, to form a recess in the insulating layer, and simultaneously removing the capping portion of the insulating layer on the first end of the conductive via.
地址 KR