发明名称 |
Level shifters, methods for making the level shifters and methods of using integrated circuits |
摘要 |
A method of making a level shifter includes coupling a driver stage between an input end and an output end, the driver stage comprising a first transistor and a second transistor. An inverter having an input is coupled with the input end. A third transistor having a gate end is coupled with an output of the inverter, the third transistor having a terminal coupled to a pumped voltage (VPP). Additionally, the method includes coupling a fourth transistor with the output end, the fourth transistor having a terminal coupled to the pumped voltage. A fifth transistor is coupled with the input end, the fifth transistor having a terminal coupled to the third and fourth transistors. A sixth transistor is coupled with the input end, the sixth transistor having a terminal. |
申请公布号 |
US9071242(B2) |
申请公布日期 |
2015.06.30 |
申请号 |
US201314107115 |
申请日期 |
2013.12.16 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
Yang Tien Chun;Swei Yuwen;Lin Chih-Chang;Pu Chiang |
分类号 |
H03K3/00;H03K19/0175;H03K19/0185;H05K13/00 |
主分类号 |
H03K3/00 |
代理机构 |
Lowe Hauptman & Ham, LLP |
代理人 |
Lowe Hauptman & Ham, LLP |
主权项 |
1. A method of making a level shifter comprising:
coupling a driver stage between an input end and an output end, the driver stage comprising a first transistor and a second transistor; coupling an inverter with the input end, the inverter having an input and an output; coupling a third transistor with an output of the inverter, the third transistor having a terminal and a gate end, the terminal of the third transistor being coupled to a pumped voltage (VPP); coupling a fourth transistor with the output end, the fourth transistor having a terminal, the terminal of the fourth transistor being coupled to the pumped voltage; coupling a fifth transistor with the input end, the fifth transistor having a terminal, the terminal of the fifth transistor being coupled to the third and fourth transistors; and coupling a sixth transistor with the input end, the sixth transistor having a terminal. |
地址 |
TW |