发明名称 Microfabricated ultrasonic transducers and related apparatus and methods
摘要 Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.
申请公布号 US9067779(B1) 申请公布日期 2015.06.30
申请号 US201514635197 申请日期 2015.03.02
申请人 Butterfly Network, Inc. 发明人 Rothberg Jonathan M.;Alie Susan A.;Fife Keith G.;Sanchez Nevada J.;Ralston Tyler S.
分类号 H01L29/00;B81C1/00 主分类号 H01L29/00
代理机构 Wolf, Greenfield & Sack, P.C. 代理人 Wolf, Greenfield & Sack, P.C.
主权项 1. A method, comprising: forming a layer of silicon oxide on a first side of a first wafer, the first wafer having a second side opposite the first side; forming a plurality of cavities in the layer of silicon oxide; bonding a second wafer with the first wafer such that the second wafer seals the plurality of cavities in the layer of silicon oxide; annealing the first wafer and the second wafer after bonding them together, the annealing utilizing a temperature above 500° C.; thinning the first wafer or the second wafer after the annealing to create a thinned wafer with a thickness less than 30 microns and greater than 4 microns; etching a plurality of trenches in the thinned wafer, the plurality of trenches defining a plurality of electrode regions of the thinned wafer; filling the plurality of trenches with an insulating material; forming metal contacts on the thinned wafer, at least some of the metal contacts corresponding to the plurality of electrode regions; bonding the thinned wafer with a complementary metal oxide semiconductor (CMOS) wafer having integrated circuitry formed therein using the metal contacts on the thinned wafer to contact bonding points on the CMOS wafer, wherein bonding the thinned wafer with the CMOS wafer is performed below 450° C.; and thinning, after bonding the thinned wafer with the CMOS wafer, the first wafer or the second wafer, whichever was not previously thinned as part of forming the thinned wafer.
地址 Guilford CT US