Nonvolatile semiconductor memory device

摘要

An erase verify operation is executed divided into at least a first erase verify operation and a second erase verify operation. The first erase verify operation is an operation that applies a verify read voltage only to a first group of memory cells among the plurality of memory cells included in the NAND cell unit, and applies a first read pass voltage to memory cells other than the first group of memory cells. The second erase verify operation is an operation that applies the verify read voltage to a second group of memory cells different from the first group of memory cells, and applies a second read pass voltage different from the first read pass voltage to memory cells other than the second group of memory cells.

主权项

1. A nonvolatile semiconductor memory device, comprising:
a memory cell array configured as an arrangement of a plurality of NAND cell units, each of the NAND cell units having a plurality of memory cells connected in series therein, each of the memory cells being capable of storing an erase state where data has been erased from the memory cell and a write state where data has been written to the memory cell; and a control circuit configured to control an operation on the memory cell array, the control circuit being configured to execute an erase operation that includes: an erase pulse application operation for changing the memory cell from the write state to the erase state; and an erase verify operation for judging whether a plurality of the memory cells are in the erase state or not, the erase verify operation being divided into at least a first erase verify operation and a second erase verify operation, the first erase verify operation being an operation that applies a verify read voltage only to a first group of memory cells among the plurality of memory cells included in the NAND cell unit, and applies a first read pass voltage to memory cells other than the first group of memory cells, and the second erase verify operation being an operation that applies the verify read voltage to a second group of memory cells different from the first group of memory cells, and applies a second read pass voltage different from the first read pass voltage to memory cells other than the second group of memory cells.