| 摘要 |
A display device includes a plurality of gate lines, data lines, first external gate tracking lines, and second external gate tracking lines. The first external gate tracking lines are substantially disposed in a border region of a substrate, and electrically connected with corresponding gate lines. The second external gate tracking lines are substantially disposed in the border region of the substrate, and electrically connected with corresponding gate lines. One of the first external gate tracking lines and a corresponding second external gate tracking line at least partially overlap with each other. |
| 主权项 |
1. A display device, comprising:
a substrate, having a display region and a border region; a plurality of gate lines, substantially disposed in the display region of the substrate along a first direction; a plurality of data lines, substantially disposed in the display region of the substrate along a second direction; a plurality of first external gate tracking lines, substantially disposed in the border region of the substrate, wherein each of the first external gate tracking lines is electrically connected with a corresponding gate line, the first external gate tracking lines are formed by a first conductive layer, a first group of the first external gate tracking lines has a first line width, a second group of the first external gate tracking lines has a second line width less than the first line width, and the first external gate tracking lines with the first line width and the first external gate tracking lines with the second line width are located alternately; a plurality of second external gate tracking lines, substantially disposed in the border region of the substrate, wherein each of the second external gate tracking lines is electrically connected with a corresponding gate line, a first group of the second external gate tracking lines has the first line width, a second group of the second external gate tracking lines has the second line width, and the second external gate tracking lines with the first line width and the second external gate tracking lines with the second line width are located alternately; a driver chip; wherein one of the first external gate tracking lines and a corresponding second external gate tracking line at least partially overlap with each other, and each of the first/second external gate tracking lines is electrically connected between the corresponding gate line and the driver chip. |
