发明名称 |
Weighted instruction count scheduling |
摘要 |
A method and system are provided for performing efficient and effective scheduling in a multi-threaded system. Dynamic control of scheduling is provided, in which priority weights can be assigned for some or all of the threads in the multi-threaded system. The priority weights are employed to control prioritization of threads and thread instructions by a scheduler. An instruction count for each thread is used in combination with the priority weights to determine the prioritization order in which instructions are fetched and assigned to execution units for processing. |
申请公布号 |
US9069564(B1) |
申请公布日期 |
2015.06.30 |
申请号 |
US201213396007 |
申请日期 |
2012.02.14 |
申请人 |
NETLOGIC MICROSYSTEMS, INC. |
发明人 |
Rashid Abbas;Hass David T. |
分类号 |
G06F9/38 |
主分类号 |
G06F9/38 |
代理机构 |
Sterne, Kessler, Goldstein & Fox P.L.L.C. |
代理人 |
Sterne, Kessler, Goldstein & Fox P.L.L.C. |
主权项 |
1. A processor, comprising:
an instruction fetch unit to fetch instructions generated by a plurality of threads; and a thread scheduler to generate a schedule for fetches by the instruction fetch unit based at least in part on priority values assigned to the plurality of threads, wherein a priority value assigned to a thread from the plurality of threads is computed by adjusting an instruction count for the thread using a priority weighting for the thread. |
地址 |
Santa Clara CA US |