Semiconductor device having mixedly mounted components with common film layers and method of manufacturing the same

摘要

A metal gate electrode and a poly-silicon resistance element are mixedly mounted in the same semiconductor substrate. The metal gate electrode is formed on a first gate insulating film and includes a first gate metal film and a first gate silicon film. The poly-silicon resistance element includes a silicon film pattern formed on a laminated pattern which includes a first laminate insulating film, a first laminate metal film, and a second laminate insulating film. The first laminate insulating film and the first gate insulating film are formed from a common insulating film; the first laminate metal film and the first gate metal film are formed from a common metal film, and the silicon firm pattern and the first gate silicon film are formed from a common silicon film. In a planar view, a footprint of the silicon film pattern is included within the second laminate insulating film.

主权项

1. A method of manufacturing a semiconductor device, comprising:
(a) forming a first insulating film over a major surface of a semiconductor substrate; (b) forming a first metal film over the first insulating film; (c) forming a second insulating film over the first metal film; (d) patterning the second insulating film with a first photo-resist pattern (PR1) to form a second laminate insulating film; (e) forming a first silicon film over the first metal film so as to also cover the second laminate insulating film; (f) forming a resist pattern having a first resist pattern portion and a second resist pattern portion over the first silicon film, the first photo-resist pattern (PR1) being larger than the second resist pattern in a planar view; and (g) etching the first silicon film and the first metal film using the resist pattern as an etching mask to thereby form: a metal gate electrode for a MISFET from the first metal film and the first silicon film over the first metal film, both of which remain under the first resist pattern portion, and a silicon film pattern for a resistance element from the first silicon film remaining under the second resist pattern, and wherein in a planar view, at least a part of the silicon film pattern formed in step (g), overlaps the second laminate insulating film.