Method and system for arbitration verification

摘要

A method for providing port arbitration verification for a design under test (DUT) is provided. The method includes sampling the availability of ports at a predetermined number of clock cycles prior to an arbitration point. The method predicts a winner at each of the clock cycles and determines a verification result based on a match between one of the predicted winners and an actual arbitration winner for the DUT.

主权项

1. A machine-implemented method for providing arbitration verification, the method comprising:
sampling port availability information for a plurality of ports of a network application specific integrated circuit (ASIC) at at least one clock cycle in advance of an arbitration point; determining a predicted arbitration winner for each of the at least one clock cycle in advance of the arbitration point, based in part on the port availability information, wherein the predicted arbitration winner identifies one of the plurality of ports to gain access to the ASIC; comparing each predicted arbitration winner to an actual arbitration winner selected by a design under test (DUT) comprising the network ASIC at the arbitration point; determining a verification fail unless the arbitration winner matches at least one predicted arbitration winner.