| 发明名称 | Integrated circuit system including stacked chips for generating ID information | ||
| 摘要 | An integrated circuit system includes a first chip including a first node and configured to generate first identification information indicating the first chip in response to a voltage of the first node, a second chip including a second node and configured to generate second identification information indicating the second chip in response to a voltage of the second node, and a channel connected to the first node and the second node and generate a voltage difference between the first node and the second node. | ||
| 申请公布号 | US9070545(B2) | 申请公布日期 | 2015.06.30 |
| 申请号 | US201213620444 | 申请日期 | 2012.09.14 |
| 申请人 | SK Hynix Inc. | 发明人 | Byeon Sang-Jin |
| 分类号 | H01L25/00 | 主分类号 | H01L25/00 |
| 代理机构 | IP & T Group LLP | 代理人 | IP & T Group LLP |
| 主权项 | 1. An integrated circuit system comprising: a channel connected to a first node and a second node and configured to generate a voltage difference between the first node and the second node; a first chip including the first node and a first replica channel obtained by modeling the channel and configured to generate first identification (ID) information corresponding to the first chip by comparing a voltage of the first node with one or more first comparison voltages generated from the first replica channel; and a second chip stacked on the first chip, and including the second node and a second replica channel obtained by modeling the channel and configured to generate second ID information corresponding to the second chip by comparing a voltage of the second node with one or more second comparison voltages generated from the second replica channel. | ||
| 地址 | Gyeonggi-do KR | ||