Semiconductor device

摘要

A semiconductor device comprises a stacked layer memory block and associated peripheral circuits, such as a booster circuit, in stacked layer arrangements. The booster circuit includes plural rectifier cells that are series-connected and plural first capacitors. The plural first capacitors receive a first clock signal on one end, and the other ends thereof are each connected to one end of a different rectifier cell. Each first capacitor is composed of plural first conductive layers that are arrayed with a set pitch perpendicular to the substrate. Either the even numbered or the odd numbered first conductive layers are supplied with the first clock signal. The other of the even numbered or odd numbered first conductive layers are each individually connected to one end of a different rectifier cell.

主权项

1. A semiconductor device, comprising:
a booster circuit for supplying peripheral circuits of a memory cell array with an output voltage higher than an input voltage, the booster circuit comprising one or more booster units, each booster unit connected to a plurality of transistors, each transistor connected to a booster circuit output terminal; the booster unit comprising:
a first set of capacitors, a first member of the first set of capacitors having a first end supplied with a supply voltage and a second end supplied with a first clock signal;a first set of transistors including first and second transistors, the gate and drain of each first set transistor electrically connected to the first end of a corresponding member of the first set of capacitors, with each transistor of the first set connected in series as diodes, with the drain and gate of a first member of the first set of transistors connected to the supply voltage, and the source of a last member of the first set of transistors connected to a booster unit output terminal;a second set of capacitors, a first member of the second set of capacitors having a first end supplied with the supply voltage and a second end supplied with a second clock signal, the second clock signal complementary to the first clock signal;a second set of transistors including third and fourth transistors, the gate and drain of each second set transistor electrically connected to the first end of a corresponding member of the second set of capacitors, with each transistor of the second set connected in series as diodes, with the drain and gate of a first member of the second set of transistors connected to the supply voltage, and the source of a last member of the second set of transistors connected to the booster unit output terminal;each of the first and second sets of capacitors of the booster unit formed in a layer stacked configuration, wherein a plurality of conductive layers are stacked with insulating layers in a stair-stepped configuration above a substrate, such that at least one end of each conductive layer is not overlapped by the conductive layer directly above, and includes first and second conductive layers that are each a first distance away from the substrate, the first conductive layer electrically connected to a gate of the first transistor and the second conductive layer electrically connected to a gate of the second transistor, and third and fourth conductive layers that are each a second distance, greater than the first distance, away from the substrate, the third conductive layer electrically connected to a gate of the third transistor and the fourth conductive layer electrically connected to a gate of the fourth transistor.