发明名称 Method of forming a single metal that performs N and P work functions in high-K/metal gate devices
摘要 The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate with a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a metal layer over the high-k dielectric layer, the metal layer having a first work function, protecting the metal layer in the first region, treating the metal layer in the second region with a de-coupled plasma that includes carbon and nitrogen, and forming a first gate structure in the first region and a second gate structure in the second region. The first gate structure includes the high-k dielectric layer and the untreated metal layer. The second gate structure includes the high-k dielectric layer and the treated metal layer.
申请公布号 US9070681(B2) 申请公布日期 2015.06.30
申请号 US201414329452 申请日期 2014.07.11
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Lin Su-Horng
分类号 H01L29/43;H01L29/51;H01L21/8238;H01L27/092;H01L29/49;H01L21/28;H01L29/78 主分类号 H01L29/43
代理机构 Haynes and Boone, LLP 代理人 Haynes and Boone, LLP
主权项 1. A device comprising: a first gate structure having a first conductivity type disposed over a semiconductor substrate, the first gate structure including: a first gate dielectric material layer;a first metal layer disposed over the first gate dielectric material layer, wherein the first metal layer has the first conductivity type; anda first conductive layer disposed over the first metal layer; and a second gate structure having a second conductivity type that is opposite the first conductivity type disposed over the semiconductor substrate, the second gate structure including: a second gate dielectric material layer;a second metal layer disposed over the second gate dielectric material layer, wherein the second metal layer has the second conductivity type, wherein the second metal layer has a top surface facing away from the semiconductor substrate and an opposing bottom surface physically contacting the second gate dielectric layer, wherein a thickness of the second metal layer is measured from the bottom surface to the top surface of the second metal layer, wherein the second metal layer includes a first region extending from the bottom surface of the second metal layer toward the top surface of the second metal layer that includes a metal material selected from the group consisting of Ta, Zn, Ti, Nb, Al, Ag, Mn, Zr, Hf, or La, wherein the first region is free of carbon, nitrogen, silicon, and oxygen, wherein the second metal layer includes a second region extending from the first region toward the top surface that includes the selected metal material and at least one of carbon, nitrogen, silicon, or oxygen, wherein the first region extends away from the bottom surface by at least 10% of the thickness of the second metal layer; anda second conductive layer disposed over the second metal layer.
地址 Hsin-Chu TW