发明名称 Bundled memory and manufacture method for a bundled memory with an external input/output bus
摘要 A bundled memory includes a substrate, a first memory die, a second memory die, a scribe line, and an electrical connection. The first memory die has a first input/output bus, and the second memory die has a second input/output bus, where the first memory die and the second memory die are formed over the substrate. The scribe line is formed between the first memory die and the second memory die. The electrical connection is formed over the scribe line for electrically connecting to the first input/output bus and the second input/output bus, where the electrical connection is electrically connected to an external input/output bus, where a size of the external input/output bus of the bundled memory is larger than or equal to a size of the first input/output bus and a size of the second input/output bus.
申请公布号 US9070558(B2) 申请公布日期 2015.06.30
申请号 US201313798227 申请日期 2013.03.13
申请人 Etron Technology, Inc. 发明人 Rong Bor-Doou;Shiah Chun
分类号 H01L23/58;H01L23/00;H01L23/538;H01L21/768;H01L21/78;H01L21/66;H01L27/108 主分类号 H01L23/58
代理机构 代理人 Hsu Winston;Margo Scott
主权项 1. A bundled memory, comprising: a substrate; a first memory die having a first input/output bus and a first address bus, wherein the first memory die is formed over the substrate; a second memory die having a second input/output bus and a second address bus, wherein the second memory die is formed over the substrate; a scribe line formed between the first memory die and the second memory die; and an electrical connection formed over the scribe line for electrically connecting to the first input/output bus and the second input/output bus, or the first address bus and the second address bus, wherein the electrical connection is electrically connected to an external input/output bus, wherein the electrical connection comprises a plurality of masked layers formed over the scribe line, the plurality of masked layers from the electrical connection, and a plurality of test pads are formed over the plurality of masked layers and positioned over the scribe line, wherein the plurality of test pads are electrically connected to a plurality of external bonding pads.
地址 Hsinchu TW