发明名称 Coherent proxy for attached processor
摘要 A coherent attached processor proxy (CAPP) of a primary coherent system receives a memory access request from an attached processor (AP) and an expected coherence state of a target address of the memory access request with respect to a cache memory of the AP. In response, the CAPP determines a coherence state of the target address and whether or not the expected state matches the determined coherence state. In response to determining that the expected state matches the determined coherence state, the CAPP issues a memory access request corresponding to that received from the AP on a system fabric of the primary coherent system. In response to determining that the expected state does not match the coherence state determined by the CAPP, the CAPP transmits a failure message to the AP without issuing on the system fabric a memory access request corresponding to that received from the AP.
申请公布号 US9069674(B2) 申请公布日期 2015.06.30
申请号 US201213686489 申请日期 2012.11.27
申请人 International Business Machines Corporation 发明人 Blaner Bartholomew;Marino Charles;Siegel Michael S.;Starke William J.;Stuecheli Jeff A.
分类号 G06F12/00;G06F13/00;G06F12/08 主分类号 G06F12/00
代理机构 Russell Ng PLLC 代理人 Russell Ng PLLC ;Baca Matthew
主权项 1. A coherent attached processor proxy (CAPP), comprising: transport circuitry having a first interface configured to support communication with a system fabric of a primary coherent system a second interface configured to support communication with an attached processor (AP) that is external to the primary coherent system and that is coupled to the CAPP, wherein the AP includes a cache memory that holds copies of memory blocks belonging to a coherent address space of the primary coherent system; snooper circuitry that services snooped memory access requests received from the system fabric on behalf of and in stead of the AP; and master circuitry that manages memory access requests within the primary coherent system on behalf of and in the stead of the AP, wherein the master circuitry, responsive to receiving a memory access request from the AP and an expected coherence state of a target address of the memory access request with respect to the cache memory of the AP, determines a coherence state of the target address with respect to the CAPP and determines whether or not the expected coherence state matches the coherence state determined by the CAPP, and wherein the master circuitry, responsive to determining that the expected coherence state matches the coherence state determined by the CAPP, issues a memory access request corresponding to that received from the AP on the system fabric of the primary coherent system, and responsive to determining that the expected coherence state does not match the coherence state determined by the CAPP, transmits a failure message to the AP without issuing on the system fabric a memory access request corresponding to that received from the AP.
地址 Armonk NY US