MOS TRANSISTOR HAVING LOW OFFSET, METHOD OF FABRICATING THE SAME, AND ELECTRONIC DEVICE USING THE SAME

摘要

A MOS transistor having a small offset includes an active layer placed in an active area; an element separation layer placed in an element separation layer limiting the active area; a gate electrode pattern placed on the active layer to avoid overlapping with the element separation layer; first conductive source and drain areas placed on the active layer between the element separation area and both sides of the gate electrode pattern; and second conductive blocking areas separately placed on the active layer between the element separation layer and upper and lower sides of the gate electrode pattern.