发明名称 METHOD, SYSTEM AND ARCHITECTURE FOR BUS TRANSACTION LOGGER
摘要 A computing device includes at least one master unit; at least one slave unit; an interconnect structure configured to route transactions from the at least one master unit to the at least one slave unit; and a transaction logger device configured to intercept and save a record of outstanding transactions sent by the at least one master unit to the interconnect structure. The transaction logger device is further configured to preserve the record of outstanding transactions when at least a part of the computing device is restarted.
申请公布号 WO2015091032(A1) 申请公布日期 2015.06.25
申请号 WO2014EP76774 申请日期 2014.12.05
申请人 TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) 发明人 ANYURU, ANDREAS;MORLAND, ULF;MÅNSSON, STAFFAN;TALLBERG, PER-INGE
分类号 G06F11/34;G06F11/14;G06F11/36 主分类号 G06F11/34
代理机构 代理人
主权项
地址