发明名称 MULTI-CORE MICROPROCESSOR CONFIGURATION DATA COMPRESSION AND DECOMPRESSION SYSTEM
摘要 An apparatus has a fuse array, a device programmer, and a plurality of cores. The fuse array is disposed on a die, where the fuse array comprises a plurality of semiconductor fuses. The device programmer is coupled to the fuse array and is configured to access the configuration data, to compress the configuration data to yield compressed configuration data, and to program the fuse array with the compressed configuration data. The plurality of cores is disposed separately on the die and is coupled to the fuse array, where each of the plurality of cores accesses and decompresses all of the compressed configuration data upon power-up/reset, for initialization of elements within the each of the plurality of cores.
申请公布号 US2015178218(A1) 申请公布日期 2015.06.25
申请号 US201514635969 申请日期 2015.03.02
申请人 VIA ALLIANCE SEMICONDUCTOR CO., LTD. 发明人 HENRY G. GLENN;JAIN DINESH K.
分类号 G06F12/08;G06F12/06 主分类号 G06F12/08
代理机构 代理人
主权项 1. An apparatus for programming, storing, and providing configuration data to a multi-core processor, the apparatus comprising: a fuse array, disposed on a die, wherein said fuse array comprises a plurality of semiconductor fuses; a device programmer, coupled to said fuse array, configured to access the configuration data, to compress the configuration data to yield compressed configuration data, and to program said fuse array with said compressed configuration data; and a plurality of cores, disposed separately on said die and coupled to said fuse array, wherein each of said plurality of cores accesses and decompresses all of said compressed configuration data upon power-up/reset, for initialization of elements within said each of said plurality of cores.
地址 Shanghai CN