发明名称 |
SCATTER-GATHER INTELLIGENT MEMORY ARCHITECTURE FOR UNSTRUCTURED STREAMING DATA ON MULTIPROCESSOR SYSTEMS |
摘要 |
A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine granularity, and off-loading memory access overhead by supporting address calculation, data shuffling, and format conversion. |
申请公布号 |
US2015178200(A1) |
申请公布日期 |
2015.06.25 |
申请号 |
US201414585573 |
申请日期 |
2014.12.30 |
申请人 |
Intel Corporation |
发明人 |
Kim Daehyun;Hughes Christopher J.;Chen Yen-Kuang;Kundu Partha |
分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
1. A processor comprising:
a core including:
a computation processor; anda scatter/gather engine coupled to the computation processor, the scatter/gather engine to generate sub-cache line sized non-sequential data accesses to a memory based on an access pattern communicated to the scatter/gather engine from and defined by an application, to communicate sub-cache line sized data with the memory, wherein the scatter/gather engine includes an access processor, an access pattern generator, and a cache interface, wherein the access pattern generator is to generate the sub-cache line sized non-sequential data accesses to the memory based on an indirect access pattern; and a cache coupled to the core, wherein data is to be transferred between the cache and the memory using full-cache line sized transfers. |
地址 |
Santa Clara CA US |