OPTIMIZED HARDWARD ARCHITECTURE AND METHOD FOR ECC POINT ADDITION USING MIXED AFFINE-JACOBIAN COORDINATES OVER SHORT WEIERSTRASS CURVES

摘要

An optimized hardware architecture and method introducing a simple arithmetic processor that allows efficient implementation of an Elliptic Curve Cryptography point addition algorithm for mixed Affine-Jacobian coordinates. The optimized architecture additionally reduces the required storage for intermediate values.

主权项

1. An apparatus for performing an elliptic curve cryptography point addition operation using mixed affine-Jacobian coordinates comprising:
a register memory for storing a first point in affine coordinates and a second point in Jacobian coordinates; a modular multiplier electrically coupled to the register memory; and a simple arithmetic processor electrically coupled to the register memory and the modular multiplier, wherein the simple arithmetic processor is configured to perform modular subtraction and modular multiplication by two in support of the point addition operation comprising a plurality of steps in mixed affine-Jacobean coordinates.