发明名称 MEMORY SYSTEM AND BANK INTERLEAVING METHOD
摘要 According to embodiments, a memory system includes a plurality of memory chips configuring banks, an instruction generator, and a memory controller. The instruction generator generates a plurality of instructions. The memory controller is configured to execute memory accesses to the banks based on the instructions. Each memory access comprises a first command sequence and a second command sequence. The first command sequence causes in-bank processing shortly subsequent to the first command. The second command sequence is executed subsequent to the in-bank processing. The memory controller executes successively a second command sequence to a first bank based on a first instruction and a first command sequence to the first bank based on a second instruction subsequent to the first instruction, and then starts a memory access to a second bank based on a third instruction while the first bank is executing the in-bank processing caused by the first command sequence.
申请公布号 US2015177993(A1) 申请公布日期 2015.06.25
申请号 US201514641930 申请日期 2015.03.09
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 IDE Takashi;IWASAKI Kiyotaka;WATANABE Kouji;NANJOU Hiroyuki;MORIYA Makoto
分类号 G06F3/06 主分类号 G06F3/06
代理机构 代理人
主权项 1. (canceled)
地址 Minato-ku JP